Principal Systems Engineer (SerDes R&D, SOC Design)
Cadence Design Systems, Inc.
SAN JOSE
hace 4 días

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

High Speed SerDes IP Principal Systems Engineering Position Description :

This is a unique opportunity to join the rapidly growing team in the SerDes IP R&D Group at Cadence Design Systems. We are looking for a Principal Systems Engineer who will be a key contributor to our advanced high speed SerDes IP products.

This is a hands-on customer facing technical position.

Main Job Tasks and Responsibilities :

Engage with IP customers towards meeting SerDes IP integration guidelines

Support customer to resolve SOC integration issues with Serdes IP

Conduct design integration reviews on customers’ major SoC milestones, and support customer debug as needed

Provide critical customer feedback to R&D team toward product improvement, and drive future specifications for advanced high-speed serial links

Generate technical specifications, datasheets, and application notes of Serdes IP product

Key contributor to R&D team to define and develop high speed SerDes IP product specifications

Position Requirements :

M.S. Electrical / Computer Engineering (or similar degree)

2+ years of relevant experience working with high-speed SerDes and PHYs

7+ years of SOC design experience, with 2+ years of IP / full chip integration

Familiarity with SOC IP integration and full chip integration design flows and issues

Knowledge and experience with front-end design flows and tools such as Digital and Analog simulations, waveform viewers, synthesis, static timing analysis, UPF, version control, etc

Familiarity with verification methodologies

Good understanding of DFT requirements and methodology for SOCs

Experience using system simulation tools, Matlab, Perl, or other scripting tools

Familiarity with high speed Serdes and serial link architecture is a plus

Knowledge and experience with advanced process technology nodes (7nm and below) is a plus

Strong ability to analyze and resolve IP integration issues related to RTL, physical, or CAD tools

Excellent written and verbal communication skills

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