Senior Systems Engineer
Cadence Design Systems, Inc.
SAN JOSE
hace 2 días

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

SerDes IP Senior Systems Engineering Position Description :

This is a unique opportunity to join the rapidly growing team in the SerDes IP R&D Group at Cadence Design Systems. We are looking for a Principal Systems Engineer who will be a key contributor to our advanced high speed SerDes IP products.

This is a hands on technical position.

Main Job Tasks and Responsibilities :

  • Key contributor to R&D team to define and develop high speed SerDes IP product specifications
  • Develop infrastructure to ensure robust product development and testing
  • Develop and provide guidelines regarding signal integrity and power integrity to customers
  • Support customer package / board design and debug as necessary
  • Generate technical specification, data sheets, and application notes
  • Update R&D team with the latest standards development, customer feedback and competitive analysis
  • Position Requirements :

  • M.S. Electrical / Computer Engineering (or similar degree)
  • 7+ years of experience working with high speed SerDes and PHYs
  • Deep understanding of high speed SerDes architecture
  • Hands on experience with high speed scopes, BERT, VNA, signal generators, and spectrum analyzers
  • Familiarity with emerging 100G IEEE standards including 802.3bj / 802.3cd / 802.3bs / 802.3ck / 802.3df
  • Experience with firmware development and regression tests
  • Experience with testchip bring-up, validation, and characterization
  • Experience generating system or IBIS-AMI models
  • Experience using system simulation tools, Matlab, Perl, or other scripting tools
  • Experience with 3D electromagnetic simulation tools is a plus
  • Strong debug and problem-solving skills
  • Must have strong group presentation skills.
  • Ability to clearly communicate technical challenges and status to senior management and executives
  • Familiarity with advanced technology nodes (16nm and below) is a plus
  • We’re doing work that matters. Help us solve what others can’t.

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