Analog DV/HVM Engineer
Intel
San Jose, H, CR
hace 1 día

Job Description

Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp.

Make significant contributions to design, development and validation of testability circuits. Evaluation, development and debug of complex test methods.

Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions.

Tests, validates, modifies and re-designs circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability.

Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints.

Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment.

Qualifications

Minimum Qualification :

Bachelor of Science Degree in Electric / Electrical Engineering or related field of studies with 2+ years of experience in semiconductor product engineering or semiconductor test content development.

2+ year experience in DFT / DFD, hardware testing methods and tools.

Test development and execution using lab equipment for analog / mixed-signal circuit characterization and debug.

Background and knowledge in hardware architecture, analog / mixed-signal design and implementation.

Intermediate to advanced English Level

Preferred qualifications in addition to the minimum requirements considered a plus factor in identifying top candidates :

Familiarity with scripting languages with emphasis on python.

Simulation and validation experience with hardware description languages such as Verilog and / or System Verilog.

Knowledge of IO protocols, specs, DFT architectures, and design (PCI Express, USB3, DDR, etc.).

Evaluation, and validation of analog / mixed-signal and DFT circuits including concepts such as timing jitter, margining, squelch, equalization.

Knowledgeable in statistical data analysis using platforms such as JMP or R.

Silicon debug and characterization of new products including working with platform and system-level validation teams to identify and close silicon issues.

Familiarity with high-frequency signal integrity concepts using frequency domain (S-parameter) and time domain metrics.

Experience with using software tools to analyze PCB physical layout and make recommendations on PCB design.

Strong oral and written communication skills including written test plans and presenting to live and virtual audiences.

Critical thinking and problem solving skills to debug circuits and make recommendations to design teams.

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