DESIGN ENGINEER-G4
NXP Semiconductors
San Jose
hace 4 días

This position requires a minimum of 11 years of experience in the verification of chip de signs. A MSEE or PhD EE is required.

  • Experience in the development of wireless technolo gies is desired. Candidate should be familiar with some of the following;
  • Verilog, VCS / NCsim, Modeltech, C-language or SystemC, Vera, Specman, System Verilog. Candidate must show a strong knowledge in the development of chip verification environments and a proven track record of taping out chips to production.

    Candidate focused expertise in CPUs, high-speed peripheral interfaces (PCIE / USB / SDIO), or any networking technology beyond verification knowledge is definitely a plus

    NXPis an Equal Opportunity / Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and / or expression, marital status, status as a disabled veteran and / or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law.

    In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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