The MPE Defect For Test / Reset / Vectors (DRV) group in Costa Rica is looking for motivated Engineer to join the team to work in the highly challenging environment of product development across Intel's product families.
The product development engineers in this team work in Architecture definitions, Circuit and Logic Design and Development recommendation for DFT implementations, Verification and Validation model development, Functional and Structural functional test content development with teams worldwide.
This team is responsible to maintain Intel's design and manufacturing quality of baseline product to the external world.
This engineering team is specifically responsible for ensuring the testability and manufacturability of the Reset and DFT content from architectural design through to production ramp.
Responsibilities of the engineers may include :
You must possess the below minimum qualifications to be initially considered for this position. Relevant experience can be obtained through school work, classes and project work, internships and / or work experience.
Preferred Qualifications :
Inside this Business Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams.
IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation.
Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.
CRExperienced HireJR0125937San Jose