At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
CadenceIP Tensilica group is a leading provider of configurable embedded processor technology. As a member of the Design Verification Team for Xtensa processors you will be responsible for verification of microprocessor cores, multiprocessor sub-systems and their peripherals.
You will implement simulation or emulation test benches, assembly / C language diagnostics, assertion checkers or coverage monitors to meet target verification goals.
You will also assist with developing test plans, debugging failures and analyzing coverage information. You will work closely with the RTL, EDA, and Functional Safety teams.
You will develop and deliver functional safety work products, including documentation needed for product safety certification.
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