Synthesis/LEC/CLP/Constraints Solutions Architect - FAST/SET
Cadence Design Systems, Inc.
hace 5 días

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Our team is looking for a candidate with a strong background on Synthesis, LEC, CLP, Constraints, P&R and timing analysis fundamentals

Understands IC design with exposure to 13nm & below process nodes

Experience with EDA tools in the IC digital implementation & signoff flows

Low power analysis and hands-on 7 / 5nm experience a plus.

Strong Tcl / Perl programming background is a must.

Requirements :

  • BS or MS in EE with 12+ years industry related experience in design and EDA (Digital Physical Implementation)
  • Experience using Digital software with at least one major EDA vendor flow. Automation skills using Perl, Tcl and shell scripting essential
  • Strong analytical & analysis skills covering design closure is critical. Deep understanding flows, able suggest solutions to customers and provide feedback to R&D based on the QoR analysis
  • Proven track record and experience working in a fast paced environment
  • Excellent customer interaction & presentation skills
  • We’re doing work that matters. Help us solve what others can’t.

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