Digital Design Sr Principal Engineer
Cadence Design Systems, Inc.
SAN JOSE
hace 10 horas

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The position is for a Sr Principal Engineer specifically focused on the signal processing and logic design aspects of high-speed serial transceivers.

Responsibilities include :

  • Architecture and design of adaptation and calibration logic used in mixed-signal serial transceivers
  • Interfacing with analog design teams and driving specifications for analog and digital functional blocks
  • Verification of mixed-signal subsystems using System Verilog or equivalent
  • Review of RTL code written by various teams
  • Development of methodologies for code reuse and automatic code generation for functions over multiple projects
  • Interfacing with physical design (PD)
  • The positions requires someone with a strong background in writing synthesizable RTL for use in high-speed serial transceivers.

    A successful hire would propagate digital design best practices to a global team in North America and India.

    Specific desired skills :

  • Verilog and System Verilog programming skills
  • Strong familiarity the with full digital physical design flow including synthesis, place-and-route, static timing, DFT insertion, and clock tree insertion
  • Intuition and open-mindedness about what functions should be implemented in digital versus analog
  • MS or PhD in Electrical Engineering or equivalent experience
  • We’re doing work that matters. Help us solve what others can’t.

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