At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
As a condition of employment with Cadence, newly hired employees will be required to provide Cadence with proof of full vaccination, unless legally entitled to an accommodation.
This is a mid / senior Applications Engineering role, responsible for providing pre-sales and post-sales technical support for our Digital Signoff tools.
The position offers opportunities for career growth and to learn advanced node techniques to optimize for power and performance across a variety of ASIC designs used in vertical segments, such as SOC / CPU / GPU / Networking / ML.
Strong knowledge of Digital Design Fundamentals, Semiconductor fundamentals and EDA digital implementation tools is required.
Experience in signoff extraction and Static Timing Analysis is desired
Prior experience with ASIC digital implementation and signoff flows and associated EDA tools is required. Experience with Cadence implementation tools at advanced nodes preferred (Genus, Innovus)
Experience in a scripting language such as TCL / Perl / Python
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