DFT Engineer Intern - Summer 2022
NXP Semiconductors
San Jose
hace 1 día


  • MBIST flow implementation / automation
  • Scan / EDT insertion and ATPG with Mentor tools
  • Verification of DFT Logic and analysis of fault coverage
  • Timing analysis for DFT Modes
  • Minimum Qualifications :

  • Candidate MUST be currently pursuing a BS / MS (preferred) degree in CS / EE or related technical field(s)
  • Knowledge of DFT fundamentals
  • Knowledge of Logic design & Static timing analysis
  • Knowledge of Verilog, SV and any scripting language (perl, etc)
  • Preferred Qualifications :

  • Excellent Design and Development experience in MBIST, pursuing an MS in EE / CS and good verbal and written communication skills
  • Experience working on Mentor / Synopsys DFT tools is a big plus
  • NXPis an Equal Opportunity / Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and / or expression, marital status, status as a disabled veteran and / or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law.

    In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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