R&D Intern
Cadence Design Systems, Inc.
hace 1 día

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

At Cadence, you’ll be part of a team that’s passionate about innovation and excited to work together to make a difference.

We’re looking for dynamic team players who are ready to push the limits of what’s possible. We offer a variety of opportunities for current students and recent graduates across all solutions and services throughout Cadence.

Whether you are an intern or full-time employee, you will immediately work on real projects alongside industry experts. We empower you as a future leader to collaborate with our global teams, develop ideas, and then run with them.

Key Qualifications

  • Currently enrolled in an undergraduate or graduate program in Computer Engineering, Electrical Engineering, Computer Science or related fields
  • Will be graduating with a minimum of a Bachelor's degree by August 2021
  • Strong verbal and written communication skills
  • Strong teamwork skills with the ability to collaborate with multiple geographies and cross-functionally.
  • Experience varies depending on area of interest but may include the following : C / C++, Python, Linux-based development, VLSI CAD algorithm development, designing data structures, algorithms, and software engineering principles
  • Description

    Your time at Cadence will give you everything you need to launch your career. Below are the various areas within the Digital Signoff Group you can explore :

    Characterization : You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis and characterization of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets.

    Experience with quality and software processes, developing and maintaining C++ based applications on a Unix or Linux environment.

    Proficiency designing data structures, algorithms, and software engineering principles.

    DDI - Routing : Your focus area will be developing the next generation routing engine while working in a team environment to design, improve, and maintain core routing technology as part of Innovus Digital Implementation system.

    Routing algorithm knowledge is preferred to implement a robust and efficient routing engine.

    DDI Synthesis : You will be working with a mentor to develop and improve global placement and detailed placement QoR in Innovus Digital Implementation System.

    Strong problem solving, analysis, and programming skills are required.

    Product Engineering : You will be part of a dynamic environment working with innovative R&D and Customer Engagement teams to influence the development of software tools for advanced chip design platforms.

    Designing, developing, troubleshooting and debugging software programs on Unix / Linux platforms. Supporting customers in performing successful tapeouts of their System-on-chip designs.

    Machine Learning : You will be part of a high energy team exploring and implementing Machine Learning and Deep Learning techniques to Electronic Design Automation EDA tools.

    You would be involved with researching and developing Machine Learning approaches to problems in the EDA and system design, as well as designing, implementing, verifying and maintaining software to address those markets.

    Tempus Timing Signoff : You will be responsible for designing, developing, troubleshooting and debugging software programs in the areas of static timing analysis with a focus on statistical analysis and incremental timing in presence of signal integrity effects.

    Experience with deep algorithmic knowledge and intent to build highly scalable solutions in C / C++, combined with passion to innovate.

    Verification : You will be focused on developing algorithms in the physical design space. You will be exposed to the development of software for Physical Verification of Integrated Circuits in a cross-geographical, multi-cultural environment and given the opportunity to learn and develop solutions for Physical Verification, which includes testing, profiling and analyzing the performance of geometric and topological functions, as well as development of prototype geometric and topological functions for improved efficiency.

    We’re doing work that matters. Help us solve what others can’t.

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