SoC Design Engineer
Intel
San Jose, H, CR
hace 2 días

All aspects of physical design implementation ranging from floor planning, synthesis, APR, clock tree, multi-power and routing leading to final GDS for graphics blocks.

Verification and signoff ranging from static timing analysis, formal verification, reliability, power crossings and layout verification

Qualifications

Minimum Qualifications :

A Bachelor's Degree in Electrical / Electronics / Computer Engineering or a directly related discipline with 3+ years of experience in lieu of degree, as outlined below

Your Experience Must Be in One, or More, of the Following Areas :

  • CAD flow development and methodology definition for APR Auto Place and Route and STA Static Timing analysis on leading technologies
  • ASIC physical design implementation and tape out
  • Power performance area (PPA) optimization through logic-design and EDA tool options
  • Demonstrated problem solving in ASIC implementation
  • Automation skills through Unix, Linux, Perl and TCL programming
  • Proficiency with one or more of the following Industry standard EDA tools : Design Complier, Genus, ICC, Innovus, Primetime, Tempus, Spyglass, RedHawk, LEC Formality, etc
  • Candidate must have unrestricted permanent right to work in Costa Rica

    Advanced English level

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