Principal Design Engineer
hace 2 días

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Principal Design Engineer

Tensilica IP division of Cadence is looking for a compiler developer to join our world-class compiler team. Our C / C++ compiler features numerous highly advanced optimizations and plays a crucial role in the continued success of Xtensa processors.

Responsibilities :

  • Software design and implementation of back-end optimizations for the Xtensa processor architecture
  • Software design and implementation of the LLVM and OpenCL ports for the Xtensa architecture
  • Benchmark evaluation for customer engagements and decisions on long-term architectural directions
  • Requirements :

  • M.S. or Ph.D. degree in Computer Science with an emphasis on compilers or a related field. Outstanding candidates with a B.
  • S. degree will be considered.

  • 2+ years of research or development experience in the compiler field.
  • Strong C / C++ development skills
  • Academic or industrial background in compiler optimizations
  • Previous experience with LVM or OpenCL
  • Good understanding of processor architecture concepts
  • We’re doing work that matters. Help us solve what others can’t.

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