Mixed-Signal Design Engineer
Cadence Design Systems, Inc.
SAN JOSE
hace 6 días

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As a condition of employment with Cadence, newly hired employees will be required to provide Cadence with proof of full vaccination, unless legally entitled to an accommodation.

Cadence promotes a high-performance culture where employees can work on cutting-edge technology in an environment that encourages them to be creative, innovate, and make an impact while working alongside the industry's brightest people and innovating for the most advanced companies globally.

Through Cadence's Electronic Design Automation (EDA) products, we've worked with a wide range of customers, from helping build the world's most powerful supercomputer to innovating in artificial intelligence and machine learning.

Cadence has been voted as a Great Place to Work globally and in the United States and is also a Fortune 100 Best Companies to Work For 8 times.

This is an opportunity to join a dynamic and growing team of experienced engineers developing physical IP for industry-standard high-speed serial-link protocols.

The successful candidate will ideally be a highly-motivated self-starter who is able to work independently to complete assigned tasks and can also contribute to project leadership.

It is expected that the candidate will contribute to all aspects of mixed-signal design, verification, and testing. This includes circuit design and development from a high-level architectural specification, post-silicon test plan development and execution, and collaboration with the digital team to achieve functional and performance closure.

The candidate must have a thorough understanding of :

  • Mixed-signal circuit design fundamentals
  • Mixed-signal circuit design and verification flows
  • Cadence analog design environment
  • Basic signal processing concepts
  • Familiarity with the following items is a plus :

  • Serial link design techniques
  • Data converter (ADCs and / or DACs) and / or clock synthesis and recovery (PLLs, DLLs, CDRs) techniques
  • MATLAB or C to facilitate architecture development
  • Hardware description languages such as SystemVerilog or VerilogA for functional model development
  • Scripting languages such as Perl or Python for automation
  • Silicon validation testing knowledge and experience
  • Other requirements :

  • Excellent verbal and written communication skills
  • Ph.D. EE degree or MS EE degree with 3+ years of analog design industry experience in advanced process technologies
  • We’re doing work that matters. Help us solve what others can’t.

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