Summer Intern
Cadence
SAN JOSE
hace 2 días

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

  • Detailed understanding of physical design automation flow and EDA tool functions.
  • Running EDA tools in each technical area to qualify the flow automation and QA.
  • Generating feedback for bug fixes and enhancements.
  • Developing documentation for knowledge sharing and training.
  • Tracking project schedules and documenting all phases of work.
  • 2.5D / 3D IC interposer packaging and integration knowledge is strongly desired.
  • Skill Requirements :

  • Understanding of ASIC design flow. Good knowledge of physical design automation flow, Tcl and Python scripting , MS Office.
  • Cadence tool experience is a plus.
  • VLSI design experience. RTL design using Verilog HDL is preferred.
  • Good trouble-shooting and technical documentation skills.
  • Education Requirements :

  • BS or above
  • MS or PhD candidate preferred
  • We’re doing work that matters. Help us solve what others can’t.

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